About me
I’m a recent Electrical & Electronics Engineering graduate (GPA 92%, Highest Honors; finished in eight semesters) specializing in Computer & Control at the University of Tripoli.
My work spans differentiable logic networks, semantic segmentation, and hardware acceleration on FPGA. I led the IEEE Student Branch (13-member exec; grew membership from ~50 to 150+; organized major events; secured ~50,000 LYD sponsorships), taught peers (EE434 online course), and built open-source projects such as an Arabic RAG chatbot toolkit.
Interests: efficient neural architectures · logic-inspired learning · edge/embedded AI · computer vision
Recent Projects
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Discretized DLGN on FPGA (Terasic DE0 / Cyclone-III)
2.38M samples/s throughput, ~420ns latency, ~155mW. Verilog from trained logic model.
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IjtihadAI — Arabic RAG Chatbot Toolkit
Scraper → embeddings → vector DB → Gradio UI (LangChain).
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LogicTreeUNet — Differentiable-Logic Upsampling for Segmentation
Extended Conv-DLGN to a U-Net with logic upsampling; IoU 0.956 (MNIST), 0.8135 (CamVid-road).